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How to make Avalon Streaming data accessible to Avalon MM based PCie end point?

Matt1
Beginner
968 Views

I want to interface a camera to a MIPI CSI2 IP core in cyclone V FPGA.The MIPI CSI2 IP core provide the data output in Avalon Streaming format, I need to pass the same data to the PCie end point.

The MIPI CSI2IP core's control registers are accessible through Avalon MM interface.

How to make the Avalon Streaming data available to the PCIe endpoint which have an Avalon MM interface?

is there any reference designs available?

 

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1 Reply
SengKok_L_Intel
Moderator
200 Views
Hi Sir, I'm assuming you are using Avalon MM PCIe IP as per below user guide. https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_c5_pcie_avmm.pdf There is no example for this case, and this is suggested to create some logic to store the payload from Avalon ST, and use the PCIe TX port to transfer out. Alternatively, you may explore the Modular Scatter -Gather DMA and determine if this is suitable for your application. Please refer to the Chapter 30 below: https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_embedded_ip.pdf Regards -SK
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