Application Acceleration With FPGAs
Programmable Acceleration Cards (PACs), DCP, FPGA AI Suite, Software Stack, and Reference Designs
477 Discussions

ODU-L with SmartNIC integration

Rajisha
Novice
1,625 Views

Hi Team,

We are trying to implement ODU-Low by integrating SmartNIC i.e FPGA PAC N3000. We found that dpdkBasebandFecMode = 1 for LDPC Encoder/Decoder in FPGA is not supported in the Bronze Release for the Open Source Community.

1.Any future release is planned to support FPGA-based FEC ?

2. And we see Bronze release supports LLS C1 and C3 configuration only for Timing and Synchronization. Is there any further release which supports LLS C2 as well?

 

Can anyone suggest please.

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JonWay_C_Intel
Employee
1,571 Views

Can you point me to where is Bronze Release for the Open Source Community and the information that you mentioned?

 

 

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JonWay_C_Intel
Employee
1,535 Views
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Rajisha
Novice
1,529 Views

Hi

The document says that current release (Bronze) supports SW FEC only.

 

Build Prerequisite — o-du-phy master documentation (o-ran-sc.org)

 

And yes we were checking it - AN 907: Enabling 5G Wireless Acceleration in FlexRAN: for the Intel® FPGA Programmable Acceleration Card N3000

We found that we need to contact Intel for userimage.

We would like to know that how to get the userimage? 

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JonWay_C_Intel
Employee
1,471 Views

Please contact your local Intel FAE so that they can understand the situation and your use case. If you do not know who your local Intel FAE is, please send me a personal message (PM) with details of your location and contact information. Thanks.

mistersinha
Beginner
1,334 Views

Nice answers

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