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Hi there!
I have an OPAE design I'm running on the S10 PACs in vLab. I'm wondering what the best methodology for measuring the design's power is. I know there's this guide that details measuring A10 PAC power. However, I'm not sure if the calculations in the spreadsheet still hold for S10. Or if there is just a better way to measure PAC power now.
Thanks!
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Hi,
Please execute " sudo fpgainfo bmc" in order to get the information needed. You can get the BMC information from https://www.intel.com/content/www/us/en/programmable/documentation/bvk1543945927773.html#iuv1572054170124.
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Hi,
Please execute " sudo fpgainfo bmc" in order to get the information needed. You can get the BMC information from https://www.intel.com/content/www/us/en/programmable/documentation/bvk1543945927773.html#iuv1572054170124.
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Hi John,
Unfortunately, I do not think I can execute that due to lack of sudoers permissions. I'm running on the Intel vLab academic compute cluster.
Thanks!
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Your welcome. Please contact Intel vLab Academic Compute cluster to see if they are able to help you on this.
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