I have created an AFU setup integrated with CCIP, Memory(DDR) and MAC. Currently I'm stuck at synthesis phase of GBS file generation(I'm adding .qip and .ip files in filelist.txt).
I''m seeing partition failure which is breaking the GBS generation, and even before the tool throws partition failure, I'm seeing an error where certain file named "alt_sld_fab_0" was not found.
Based on some online suggestions, I removed stp related files(directed to e10 folder, ethernet folder) from Quartus>Project>Add/remove files form Project. But it didn't help. Please note signal tap analysis is disabled in properties.
I'm attaching the file with detailed error report, please find it in attachments.
Software : Intel Quartus Prime Pro 17.1.1
Target Card : Intel Programmable acceleration card with Intel Arria X FPGA
Any suggestion on this will be helpful.