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Unable to debug UEFI BIOS on a minnowboard max A2 with XDP3

ctang28
Beginner
967 Views

Our team using a minnowboard max A2 to develop UEFI BIOS, but the bios hangs after BIOS_RESET_CPL has been written if the XDP3 is attached to the board and Intel System Debugger is connected to XDP3. If we skip the write operation, booting will go on, then hangs at the first time the BIOS try to trigger an SMI using mSmmControl2->Trigger in function SmmCommunicationCommunicate.

The board can boot to OS without any problem if Intel System Debugger is closed, even if XDP3 is attached to the board.

And everything is OK if we connect Intel System Debugger to the board after it boots to Setup or EFI Shell.

so how can we debug the early boot stage?

Our team built the BIOS on a Linux machine with gcc=4.9 following the instructions at https://software.intel.com/en-us/articles/minnowboard-maxturbot-uefi-firmware

Board : minnowboard max A2

JTAG hardware : Intel blue box ITP-XDP 3BR

Debugger: Intel System Debugger legacy 2020

Intel Binary Objects: R1.01

Edk2: UDK2017

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CarlosAM_INTEL
Moderator
884 Views

Hello, @ctang28​:

 

Thank you for contacting Intel Embedded Community.

 

The proper channels to handle this third-party device issue should be the listed as a reference on the following website:

 

https://github.com/tianocore/tianocore.github.io/wiki/Reporting-Issues

 

Best regards,

@Mæcenas_INTEL​.

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ctang28
Beginner
884 Views

It seems that there is a watchdog timer, BIOS must write the BIOS_RESET_CPL register as soon as possible, otherwise the watchdog would timeout, and cpu hangs.

 

BIOS will disable the watchdog timer after programming a lot of base address register.

Neither put breakpoints before BIOS disable the watchdog timer, nor single step from reset vector.

 

And Intel DO provide a script to disable the watchdog timer, just rename scripts/hooks/target_reset_handler.mbmax.xdb to target_reset_handler.xdb, then the watchdog timer will be disabled automatically when the board resets.

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CarlosAM_INTEL
Moderator
884 Views

Hello, @ctang28​:

 

Thanks for your update.

 

Could you please clarify if the provided information has been solved your problem?

 

We are waiting for your reply.

 

Best regards,

@Mæcenas_INTEL​.

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ctang28
Beginner
884 Views

YES, we can debug the whole boot stage from sec to rt with the TCO disabled

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CarlosAM_INTEL
Moderator
884 Views

Hello, @ctang28​:

 

Thanks for share the solution to this situation.

 

Please do not hesitate to contact us if you have any consultations associated to Intel Embedded devices.

 

Best regards,

@Mæcenas_INTEL​.

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