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Test pattern generator for 10G

KMANO3
Novice
1,163 Views

Hi,

we developed custom board based on Intel Xeon D-1559 processor. It has 2 ports of 10G Base KR - SFP+ ports on the board. we are now performing electrical validation of these two ports using pre-compliance scope software. Kindly suggest how do we generate the below test patterns

  1. How to generate 8 ZEROS and 8 ONES Pattern?
  2. How to generate PRBS31 Pattern?
  3. How to put PHY into a Loopback for RX Testing on both ports
  4. How to gain access to 10G PHY TX registers to tune emphasis values in case failures are encountered on TX side?
  5. How to gain access to 10G PHY RX registers to tune EQ values in case failures are encountered during RX testing?

Request your support for the same

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3 Replies
CarlosAM_INTEL
Moderator
1,148 Views

Hello, @KMANO3:

Thank you for contacting Intel Embedded Community.

You can use the Intel Annex 69B Ethernet Board Channel Executable Simulation Kit document # 550875 for the proposes listed on your previous communication. It can be found when you are logged into your Resource & Design Center (RDC) privileged account on the following website:

http://www.intel.com/cd/edesign/library/asmo-na/eng/550875.htm

The RDC Account Support form is the channel to process your account update request or report any inconveniences with the provided site. It can be found at:

https://www.intel.com/content/www/us/en/forms/support/my-intel-sign-on-support.html

Best regards,

@CarlosAM_INTEL.

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KMANO3
Novice
1,136 Views

Hi, Thanks for your response

We have downloaded the files and couldn't see any options for generating test patterns that are required for 10G Base KR validation. Is there any PHY tune tools available for 10G Base KR? if yes kindly share it

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CarlosAM_INTEL
Moderator
1,125 Views

Hello, @KMANO3:

Thanks for your reply.

Could you please confirm that the affected design has implemented the requirements of the SFP+ Implementation? You can find this information in Figure 9-2, on page 191 of the Grangeville with Intel Xeon Processor D 1500 Product Family Platform Design Guide (PDG) document # 543448. You can find this document when you are logged into your Resource & Design Center (RDC) privileged account on the following website:

http://www.intel.com/cd/edesign/library/asmo-na/eng/543448.htm

The RDC Account Support form is the channel to process your account update request or report any inconveniences with the provided site. It can be found at:

https://www.intel.com/content/www/us/en/forms/support/my-intel-sign-on-support.html

Best Regards,

@CarlosAM_INTEL.

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