I am not sure if this is the right place to post this question, if not please correct me.
I am using an Intel I210 card on my linux PC. I was trying to generate a clock output on one of the SDP pins, so I followed the section-22.214.171.124.3 in Intel-i210 data sheet.
According to Time Sync Interrupt Cause Register(TSICR) description, we can get interrupts to driver for "every output clock half-cycle on SDP pin". So I configured the registers accordingly from the "igb_avb driver" (few changes to original driver in Open-AVB).
The problem is, I am not getting those clock interrupts. Basically what I was looking for is, to get periodic interrupts from the SDP clock to igb_avb driver, to perform some tasks.
Have someone tried this before ?
Registers I configured (for CLK1 on SDP1) are:
IMS - set Time sync interrupts
TSIM - enable interrupt for Target Time1(TT1)
TSSDP - enable SDP1 and assign CLK1
TSAUXC - enable CLK1
CTRL - set SDP as output
FREQOUT - set clock half-cycle
Please let me know if any more information is required.
I didn't probe the SDP pin with a scope. But I was reading the "SDP1 DATA" bit periodically in "Device Control Register - CTRL" to check if there are any pulses.
Not sure if it is the right method, but I could see the level change with period read operations. But there were no interrupts to the driver.
I am not sure if I can provide a shot on scope, but I'll try.