Intel I210: Synchronized Output Clock on SDP Pins

[idata]

Hi,

I am not sure if this is the right place to post this question, if not please correct me.

I am using an Intel I210 card on my linux PC. I was trying to generate a clock output on one of the SDP pins, so I followed the section-7.8.3.3.3 in Intel-i210 data sheet.

According to Time Sync Interrupt Cause Register(TSICR) description, we can get interrupts to driver for "every output clock half-cycle on SDP pin". So I configured the registers accordingly from the "igb_avb driver" (few changes to original driver in Open-AVB).

The problem is, I am not getting those clock interrupts. Basically what I was looking for is, to get periodic interrupts from the SDP clock to igb_avb driver, to perform some tasks.

Have someone tried this before ?

Registers I configured (for CLK1 on SDP1) are:

IMS - set Time sync interrupts

TSIM - enable interrupt for Target Time1(TT1)

TSSDP - enable SDP1 and assign CLK1

TSAUXC - enable CLK1

CTRL - set SDP as output

FREQOUT - set clock half-cycle

Please let me know if any more information is required.

Thanks.

[idata]

Hi Shiva_Kumar,

Thank you for the post. I will have to check on this inquiry.Thanks,wb

[idata]

Hi Shiva_Kumar,

Good day. Can you help clarify if you are actually getting clock pulses of the pin? Can you also provide the scope shot of the pulse? Thanks. Rgds,wb

[idata]

Hi Shiva_Kumar,

Please feel free to provide the information.rgds,wb

[idata]

Hi,

I didn't probe the SDP pin with a scope. But I was reading the "SDP1 DATA" bit periodically in "Device Control Register - CTRL" to check if there are any pulses.

Not sure if it is the right method, but I could see the level change with period read operations. But there were no interrupts to the driver.

I am not sure if I can provide a shot on scope, but I'll try.

Thanks,

Shiva

[idata]

Hi Shiva,

Thank you. Please feel free to provide in case you are able to capture the data.rgds,wb