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AGILEX ETILE ETHERNET IP

sumanth1
Novice
885 Views

HI 

I am using AGILEX FPGA -AGFB012R24B2I3E.

 I want to configure 10G Base-T Ethernet PHY on AGILEX - E tile Bank. The external Phy is capable for XAUI, XFI, RXAUI interfaces protocol. Now, I am using E-tile Ethernet IP for Agilex. it is not generating MDIO and MDC pin through IP.

 

Please suggest Which IP need to use for configuring 10G BASE-T and provide any reference design for Ethernet MDIO access to configure external PHY. 

4 Replies
ZiYing_Intel
Employee
846 Views

Hi sumanth1,


Thanks for submitting the issue.

Please do let me have some time to look into your case and I will get back to you with findings.


Best regards,

Zi Ying


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ZiYing_Intel
Employee
811 Views

Hi sumanth1,

 

If you wish to configure 10G BASE-T Ethernet PHY on Agilex together generating MDIO and MDC pin, you may use Triple Speed Ethernet IP. For more details information about the triple speed ethernet IP, you may refer to link below, 

https://www.intel.com/content/www/us/en/docs/programmable/683402/22-4-21-1-0/about-this-ip.html

 

Best regards,

Zi Ying

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sumanth1
Novice
753 Views

Hi Zi Ying,

 

Thanks for your replay. we have gone thru your link but that Triple Speed Ethernet IP is for 1G only and we require to interface 10G. 

please let me know the solution.

 

--

Regards,

Sumanth Raju

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ZiYing_Intel
Employee
781 Views

Hi sumanth1,

 

Since I have addressed your question and didn't hear any feedback from you, I am now close the case. If you still have question after the case closed, please do feel free to submit another issue.

 

Best regards,

Zi Ying

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