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ALTGX transceiver operates in Lock-to-Reference mode?

Altera_Forum
Honored Contributor II
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Hi, 

Can the ALTGX transceiver be succesfully operated in lock-to-reference mode? Or does it have to be switched into lock-to-data mode before data can be recovered?
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Altera_Forum
Honored Contributor II
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If you put the transceiver in lock-to-reference mode, it will not attempt to recover and lock to the clock from the incoming data stream. So essentially your input data will be asynchronous to your clock. I'm not sure what your reason for doing this would be. Typically it's done when oversampling the input data in which case you are responsible for recovering the data in logic. 

 

Jake
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Altera_Forum
Honored Contributor II
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So basically, is the lock-to-reference mode just to allow the CDR to get close to the correct frequency before locking to the data? The transceiver is not intended to be used in lock-to-reference mode? 

 

If your reference clock is in some constant frequency relationship with your data (like say, ref clk is 10% of the data frequency), then is it possible to use the transceiver in lock-to-reference? Then at least the sampling clock should be in sync with the incoming data. Although I'm not sure what would determine the sampling phase in that case.
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Altera_Forum
Honored Contributor II
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Certainly you can operate the transceiver in LTR mode. As I mentioned, oversampling in one instance where you want to do this. 

 

However, in your case you have the problem that you stated. You can lock to the refernce clock and be sure that your frequency is correct but your phase may not (and most likely will not) match the phase of the data. I don't know the altgx transceiver well enough to know if you have some manual method available for then changing the sampling phase of the receiver. 

 

Jake
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