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Altera VIP - Cores with Parallel Pixel Option

Honored Contributor II



Can someone explain how to take advantage of the latest version of Altera VIP suite where cores support multiple pixels in parallel? Previously (ie. Quartus 13.1 or earlier) only supported Avalon-ST with 1 pixel. 


Also, since the parallel pixel option is supported with only some of the cores, how do we interface between cores with single pixel versus cores with multiple pixel? A clock-crossing bridge? 


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3 Replies
Honored Contributor II

Also, by choosing multiple pixel, does it mean the cores can be run at reduced clock speed (e.g. single pixel based path runs at 148.5MHz, then 2 pixels in parallel run at 74.25MHz)???

Honored Contributor II

First off, let me give my opinion on your data rate question... yes, you should be able to do 1080p60 at a avalon buss speed of 74.25 with the two pixels per cycle... Basically, I think, it's just a parallel pipe for another pixel. This would be a real advantage if they had bothered to define how you handle the packet signalling... things like SOP & EOP... I can believe that if the sinc is also setup for 2pixels per transmission you would be fine for the data, ready, valid signals... but I think they had to make decision as to how to handle the SOP & EOP that aren't just obvious.  


Where do we get that information if we want to write some custom Qsys modules that are 2 or 4 pixels per transmission???? 


I have a poorly chosen device (which shall remain nameless) that needs to generate a frame doubler. I can do it with color space conversion and chroma resampling but I need to get two pixels per transmission into the frame buffer.... I've looked at using the color plane sequencer to put in two 8bit pixels and output a single 32 bit pixel... but I'm getting an error as follows: 


the source has empty signal of 2 bits, but the sink does not. Please insert appropriate adapter for video IP connection. 

the sink has empty signal of 2 bits, but the source does not. Please insert appropriate adapter for video IP connection. 


These two errors are happening between the Sequencer and the Frame Buffer II... 


So either I need to understand and fix the above errors or get the specification of the Avalon stream in regard to moving 2 pixels per transmission... 


Honored Contributor II

For the errors you mentioned, you may need AV-ST Data Format and/or Timing Adapters. Take a look at Altera's AN427 doc. 


I agree the documentation is very unclear with regard to how to setup the AV-ST protocol when doing parallel pixel transmission.