I'm having some trouble migrating from V9.1 to V11 of the Altmemphy DDR2 Core.
I can get the design to work under the V11 toolchain if I use the DDR2 V9.1 cores. However, if I upgrade the DDR2 cores to V11 – if the only thing I change is the DDR2 core, the DDR2 fails.
Here are the steps I took to migrate from V9.1 to V11 in SOPC builder:
1. Under 9.1, save the memory presets to an XML file.
2. Replace the V9.1 Core with the V11 core.
3. Load the XML Preset File.
4. Set the memory Settings, PHY Settings, Board Settings, and Controller Settings tabs in the V11 core to be the same as in the 9.1.
In the final step (#4) I noticed a couple subtle difference in the core settings:
- The calculated slew rates for tIS and tDS were different in between the cores, on V11 these values were 0, but over 100ns on 9.1. I tried both the V11 and V9.1 calculated values on the V11 core, but there appeared to be no difference.
- The V11 core has an “enable reordering” option with is enabled by default, V9.1 does not have this setting. Once again, I tried both ways to no avail.
Other than these two settings , all settings were the same between the DDR2 cores.
Does anyone know of any additional or special considerations that I need to make when migrating between these two cores? Any explanation for the calculated tIS/tDS discrepancy?
