FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
Announcements
Intel Support hours are Monday-Fridays, 8am-5pm PST, except Holidays. Thanks to our community members who provide support during our down time or before we get to your questions. We appreciate you!

Need Forum Guidance? Click here
Search our FPGA Knowledge Articles here.
5915 Discussions

Arria 10/Cyclone 10 Transceiver

SKara
Beginner
496 Views

I am using the "Transceiver Native PHY Intel Arria 10/Cyclone 10 FPGA IP" and set "adaptation enabled" in the DFE mode.

In this mode, will the DFE tap be always calibrated automatically or do we need to write some registers to initialize the calibration each time?

If we need to write to some register, could you please send us a reference?

0 Kudos
1 Reply
Deshi_Intel
Moderator
124 Views
Hi Serge, User needs to trigger the DFE adaptation via some register write. You can refer to Arria 10 transceiver phy user guide doc page (464/465) for the instruction on how to do it. https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/arria-10/ug_arria10_xcvr... Thanks. Regards, dlim
Reply