Arria 10/Stratix 10 PCIe SR-IOV DMA

[agula]

Hello,

Is there any design references that use DMA for PCIe SR-IOV.  I would like to initiate DMA request from the PCIe endpoint. All the examples in the user guide only handled mem writes and completions. Where can I find information on this  ? 

Thank you 

[agula]

Can anybody provide any insight on this ? All example designs show Avalon ST interface to Avalon-MM with burst. I would like to know if there's an example design that up-stream DMA. Host to FPGA and FPGA to host.

Thanks! 

[Rahul_S_Intel1]

The only information available is from the UG :

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_s10_pcie_avst.pdf