Avalon MM Addressing

FPGA Intellectual Property

PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP

Avalon MM Addressing

925 Views

Hi Guys,

I connected an custom VHDL Avalon MM Master with an Avalon MM Slave in Qsys.

Both Master and Slave are identical except the address with. I tried multiple addresses from the master , but avmm_slave_memory_burst_0 will be always accessed.

Which address has to be used by the master to access the Second Slave??It should be 0x30000 ??????

This should be a very easy task and I don't get it why it don't work. In attachment are also the interface settings .

Like you see in the slave interface settings, the waveform is not showed because of error/warning. But I dont have any message... http://www.alteraforum.com/forum/attachment.php?attachmentid=11135&stc=1 http://www.alteraforum.com/forum/attachment.php?attachmentid=11136&stc=1

Thanks for help

Link Copied

0 Replies

Community support is provided Monday to Friday. Other contact methods are available here.

Intel does not verify all solutions, including but not limited to any file transfers that may appear in this community. Accordingly, Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.

For more complete information about compiler optimizations, see our Optimization Notice.