Hello,
I'm evaluating the Video IP suite (quartus version 9.2).
I use a Stratix III development kit and a terasic HSMC DVI daugther board.
The input video is a progressive 1024x768 DVI format.
I have connected in SOPC a NIOS, a clock video input and a clock video output. I just want to verify that my video can go trought my FPGA (Later I will add a frame buffer,etc, ....)
I have generated the clock video output with 3 modes for video matching.
I'm trying to set one this 3 modes and to have the input video matching with this mode. The video_match value always stay at false even if I can see the correct values in the stream at the input (Avalon-st sink) of the Clock Video Output.
Beacuse the video format is not recognized, the FPGA (clock video output) doesn't generate correctly data and synchro signal for the terasic component.
Does somebody use this IPs with DVI format ? Is there a particular way set with the NIOS a mode in the clock video output?
Thanks in advance for feedback.
Christian
