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Complex multiplication implementation & FFT

Honored Contributor II

Dear all, 


I have first a question regarding the usage of DSP resources, and then a remark regarding the complex multiplication implementation with Altera FFT MegaCore. 


When you implement an FFT, you have the possibility to choose if you want to implement the complex multiplications using 4 multipliers and 2 adders (conventional representation), or 3 multipliers and 5 adders (canonical representation). 


I have tested both implementation, with the following FFT parameters :Stratix III FPGA targeted, 2048-point transform length, 18-bit resolution for input and twiddle, streaming implementation. When I look at the DSP resource usage after compilation, I have the following : 

When using 4 multipliers, the FFT uses 24 DSP 18x18, or 24 DSP 18-elements. Here, everything is ok. 

When using 3 multipliers, the FFT uses 18 DSP 18x18, or 36 DSP 18-elements. There are less multipliers used, but more DSP elements. 


In the ALTMULT_COMPLEX documentation, it is written that the canonical representation can be used only under certain condition, and in particular it cannot be used for Stratix III FPGA (and more recent). I think this is the cause. Because if I implement the same FFT on Cyclone III FPGA (where the canonical representation can be used), I obtain the same ratio between the number of DSP elements and the number of multipliers used in both cases. 


my question is : what is important in the consumption is well the number of DSP elements, not the number of multipliers used ? 


According to my understanding yes. But what is strange is that it is not possible to use the canonical in the ALTMULT_COMPLEX for Stratix III FPGA (the checkbox is deactivated), whereas it is possible to use it with the FFT, even if it is not worthwhile. It can be misleading if we do not pay enough attention. 


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