I want to produce an output clock (82.5 MHz ) from an incoming Clock (160 MHz) by using of Fractional N-PLL.
I chose "Enable Physical output clock Parameters" option.
Then, I've chosen Fractional N-PLL option at the "Reference Clock Frequency" raw, but immediately I'm getting :
"Error: FPLL_002: The specified configuration causes Voltage-Controlled Oscillator (VCO) to go beyond the limit."
The Reference Clock Frequency located between 50 MHz and 700 MHz.
But when I de-assert "Enable Physical output clock Parameters" option, then previous Error disappears.
What is wrong? Why I cannot change an output clock parameters manually?
P.S. The print-screen with an error and definitions is attached.
The above is a known problem and it is not fixed as of now, any ways I will provide you a work around from t the below KDB.
Hope it helps