I couldn't figure it out why the local_ready goes low after many write or read cycles. I checked and the proper_beats_in_fifo = 0. Does anyone have the similar issue with the DDR2 controller?
--- Quote Start --- Maybe you have experienced the following issue? http://www.alterawiki.com/wiki/local_ready_signal_issues_with_altera_external_memory_controller_ip --- Quote End --- Thank God, finally, the lousy documentation, whole day wasted! Look at the description of local_ready and the timing waveform of in the DDR2 documents! oh man :-s!