Please I have a ddr3 uniphy and when I analys I have this error pleaaase help me. I am using quartus 10.1 and a stratix ivError: Termination logic block atom "ddr3_x16:the_ddr3_x16|ddr3_x16_controller_phy:controller_phy_inst|ddr3_x16_memphy_top:memphy_top_inst|ddr3_x16_oct_control:uoct_control|sd2a_0" uses SERIESTERMINATIONCONTROL port, which must be connected to SERIESTERMINATIONCONTROL port on an output buffer atom Error: Termination logic block atom "ddr3_x16:the_ddr3_x16|ddr3_x16_controller_phy:controller_phy_inst|ddr3_x16_memphy_top:memphy_top_inst|ddr3_x16_oct_control:uoct_control|sd2a_0" uses PARALLELTERMINATIONCONTROL port, which must be connected to PARALLELTERMINATIONCONTROL port on an output buffer atom
What setting do you have OCT set to on the first tab of the IP's GUI? Master or slave?Have you connected the oct_rup and oct _rdn ports to correct device pins?
I set master OCT, and for oct_rup and oct_rdn ports are connected from ddr3 to the top of my project, I think they are connected well.but I still have the same error :( thank you for your replay
You need to source the <variation_name>_pin_assignments.tcl script that will make the appropriate calibrated termination assignments to the IO. For instance:set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to mem_dq -tag __my_ddr3 set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to mem_dq -tag __my_ddr3 set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to mem_dq -tag __my_ddr3 You have OCT block enabled but the IO are not set to use it. Good luck, -Chris
--- Quote Start --- Thank you that was the broblem I run my pin_location and now it works fine. thak youuuuuuuuu :) --- Quote End --- Hi,can you show me the schematic about the rdn and rup connect? Now i use the stratix iv 820 device,and i use the ddr2 with uniphy.Now i found it can not calibration. I do not know why? can you help me? Thanks a lot.