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DDR3 verification failed on Stratix4 Development Board

Altera_Forum
Honored Contributor I
741 Views

Hi , 

 

I generated my system consisting of ddr3 controller and nios2 processor according to this tutorial (http://www.alterawiki.com/wiki/design_example_-_stratix_iv_ddr3_sdram_uniphy_400mhz_x8) ( but without on-chip memory used in tutorial ) . Qsys successfully generates system and i am able to program my Stratix 4 . But when i try to run c++ application on nios2 hardware , eclipse fails while verifying contents of DDR3 memory. I have already double checked clock and reset connections , pin assignments but problem is still present. Does anyone have idea what i may be doing wrong? 

 

Regards
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