FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
6260 Discussions

DE1-SOC hps ddr3 memory

Honored Contributor II



I m working in a project using DE1 soc board and i am trying to write data to hps ddr3 from FPGA .To do that i have to limit the memory used by linux ?I found that to limit the memory used by linux i ca n used this command : bootargs root=/dev/mmcblk0p2 rw rootwait console=ttyS0,115200 mem=800M 



can I use this command for my board (DE1-SOC).because i found in some posts that for this board we can't limit the memory used by linux beacuse the uboot isn't open source:cry: .I read this in that post 


connecting onchip memory or sdram to the hps using hps to fpga bridge 




I am using the Terasic DE1-SoC board with the Linux LXDE example as a base. 

For a project I need to transfer about 10Myte/sec of data from the FPGA to the HPS. 

If possible I want to use the 64Mbyte SDRAM connected to the FPGA, the FPGA places the data inside it and the HPS onlu needs to read it out. 

To get something small working I started with some on chip memory. In Qsys I added 32Kbyte 32bit wide on chip memory and connected this to the lightweigth bridge.  

And after a bit of experimenting in Linux with the C code it works :) 

I can write data to it and read it back in, all in linux running on the HPS. 


If I connect it to the normal HPS to FPGA bridge instead of the lightweight bus things go quite wrong  

I used 0xc000_0000 instead of 0xff20_0000 as offset but when I try to write 32K of data to it the whole system just crashes  

Is there anything else I need to fo differently when using the HPS to FPGA bridge instead of the LW one except the offset change? 


I eventually want to use the SDRAM on the FPGA instead of the on chip memory. Is it possible to connect it to the HPS to FPGA bridge and read the content of it in Linux on the HPS? 

I only need to read it, read/write would be nice but isnt essential. 


Or am I looking at it in a wrong point of view and are there better ways to send data from the FPGA to the HPS? 

I looked at writing data to the HPS DDR3 like used here: https://support.criticallink.com/red..._to_hps_memory (https://support.criticallink.com/redmine/projects/mityarm-5cs/wiki/writing_to_hps_memory

But after mailing Terasic I learned that their Uboot isnt open source so it seems that I can't add the MEM=512M flag, making that example impossible  

I am quite new to the FPGA + HPS idea and have some experience in VHDL and Linux but not really in building a linux distro for an embedded platform. 


Best regards, 




thanx in advance 

0 Kudos
0 Replies