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Hi All,
Could someone please explain what's DPA in LVDS? Are there any available materials on the subject?
Thank you!
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Hi Dmitry
Thanks for your inquiry.
DPA refers to dynamic phase alignment block, where it automatically adjusts the clock phase to achieve optimal data-to-clock skew for LVDS receiver.
For more explanation, we can refer to the link below, taking Arria 10 device as example:
https://www.intel.com/content/www/us/en/programmable/documentation/sam1403483633377.html#sam1403482372383 (Section 5.6.5.1.1 DPA Block)
Thanks.
Eng Wei
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Hi Dmitry
Thanks for your inquiry.
DPA refers to dynamic phase alignment block, where it automatically adjusts the clock phase to achieve optimal data-to-clock skew for LVDS receiver.
For more explanation, we can refer to the link below, taking Arria 10 device as example:
https://www.intel.com/content/www/us/en/programmable/documentation/sam1403483633377.html#sam1403482372383 (Section 5.6.5.1.1 DPA Block)
Thanks.
Eng Wei
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Hi Dmitry
We do not receive any response from you to the previous answer that we have provided. This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.
Eng Wei
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Hi Dmitry
Sorry for not realizing that my previous answer has been accepted as solution.
I’m glad that your question has been addressed, I now transition this thread to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.
Eng Wei

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