FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
Announcements
Intel Support hours are Monday-Fridays, 8am-5pm PST, except Holidays. Thanks to our community members who provide support during our down time or before we get to your questions. We appreciate you!

Need Forum Guidance? Click here
Search our FPGA Knowledge Articles here.
5890 Discussions

Error when running pin_assignment tcl script

YChen31
Beginner
1,049 Views

Hi everyone,

 

After I used IP catalog to generate my DDR3 controller, the system will automatically generate pin_assignment tcl script.

However, when I ran the tcl the console showed the error messages below.

 

Error:Info: *******************************************************************   Error:Info: Running Quartus Prime TimeQuest Timing Analyzer   Error: Info: Version 17.1.0 Build 590 10/25/2017 SJ Standard Edition   Error: Info: Copyright (C) 2017 Intel Corporation. All rights reserved.   Error: Info: Your use of Intel Corporation's design tools, logic functions   Error: Info: and other software and tools, and its AMPP partner logic   Error: Info: functions, and any output files from any of the foregoing   Error: Info: (including device programming or simulation files), and any   Error: Info: associated documentation or information are expressly subject   Error: Info: to the terms and conditions of the Intel Program License   Error: Info: Subscription Agreement, the Intel Quartus Prime License Agreement,   Error: Info: the Intel FPGA IP License Agreement, or other applicable license   Error: Info: agreement, including, without limitation, that your use is for   Error: Info: the sole purpose of programming logic devices manufactured by   Error: Info: Intel and sold by Intel or its authorized distributors. Please   Error: Info: refer to the applicable agreement for further details.   Error: Info: Processing started: Wed Oct 24 01:21:35 2018   Error:Info: Command: quartus_sta -t D:/Quartus/projects/18.1/ddr3_test_v2/DDR3_controller/DDR3/DDR3_p0_pin_assignments.tcl ddr3_test_v2   Error:Info: Quartus(args): ddr3_test_v2   Error:Error (23031): Evaluation of Tcl script D:/Quartus/projects/18.1/ddr3_test_v2/DDR3_controller/DDR3/DDR3_p0_pin_assignments.tcl unsuccessful   Error:Error: Quartus Prime TimeQuest Timing Analyzer was unsuccessful. 1 error, 0 warnings   Error: Error: Peak virtual memory: 468 megabytes   Error: Error: Processing ended: Wed Oct 24 01:21:37 2018   Error: Error: Elapsed time: 00:00:02   Error: Error: Total CPU time (on all processors): 00:00:02   Error:------------------------------------------------   Error:ERROR: Unable to find active revision name. Make sure there is an open, active revision name.   Error: while executing   Error:"get_micro_node_delay -micro WL_DCD -parameters {IO VPAD} -in_fitter"   Error: (file "D:/Quartus/projects/18.1/ddr3_test_v2/DDR3_controller/DDR3/DDR3_p0_timing.tcl" line 105)   Error: invoked from within   Error:"source "$script_dir/DDR3_p0_timing.tcl""   Error: (file "D:/Quartus/projects/18.1/ddr3_test_v2/DDR3_controller/DDR3/DDR3_p0_pin_assignments.tcl" line 179)   Error:------------------------------------------------   Error: while executing   Error:"exec $cmd -t [ info script ] $project_name "   Error: invoked from within   Error:"if { ![info exists quartus(nameofexecutable)] || ($quartus(nameofexecutable) != "quartus_sta" && $quartus(nameofexecutable) != "quartus_map") } {   Error: pos..."   Error: (file "D:/Quartus/projects/18.1/ddr3_test_v2/DDR3_controller/DDR3/DDR3_p0_pin_assignments.tcl" line 129)   Error: invoked from within   Error:"_source D:/Quartus/projects/18.1/ddr3_test_v2/DDR3_controller/DDR3/DDR3_p0_pin_assignments.tcl"   Error: ("uplevel" body line 1)   Error: invoked from within   Error:"uplevel 1 $cmd "   Error: (procedure "source" line 5)   Error: invoked from within   Error:"source "D:/Quartus/projects/18.1/ddr3_test_v2/DDR3_controller/DDR3/DDR3_p0_pin_assignments.tcl""

I spend about 2 days on this problem but still can't find the solution.

It would be very help if anyone have similar experience or just give me some hint.

Thanks!

 

0 Kudos
1 Reply
AnandRaj_S_Intel
Employee
274 Views

Hi,

 

Have you performed analysis and synthesis of the design by clicking Processing > Start > Analysis and Synthesis?

I have successfully run xx_pin_assignment.tcl script attached the image and tcl console log.

I have used Quartus 18.1 std.

 

Let me know if this has helped resolve the issue you are facing or if you need any further assistance.

 

Best Regards,

Anand Raj Shankar

(This message was posted on behalf of Intel Corporation)

DDR3pinAssignment1.jpg

DDR3pinAssignment2.jpg

 

 

Reply