Ethernet detection Issue

[snehal_p]

Hello,

 PFA block diagram, we have Ethernet RMII Interface on the cyclone V board is connected through FPGA IO. We are using Triple ethernet ip in 10Mbps mode to interface.

Clock 50 Mhz is given to the CL0_CLK50M000, CL0_nRESPHY is held high. Even if we do not interface other signals Ethernet should be detected at the Ethernet's RJ45 connector, but it is not being detected.

We are using customized board, with Cyclone device in Block Diagram, Quartus Prime 18.1 Standard version tool with Evaluation license.Thus we are using time_limited.sof for testing.

Can you help with pointers on what could be the issue with detection of Ethernet.

Thanks

[paveetirrasrie_Intel]

Hi Snehan,

I believe you're using time limited sof. We do have time limitation while using time limited sof. Below attached picture has the details.

Is the ethernet not detected at all or suddenly it held low? Is there any other evaluation mode IP is included in your design?

[snehal_p]

Hello Paveetirra_Srie,

We are using time limited sof. Can you reshare the picture you shared above as it is not loading. Ethernet is not detected at all. We are using triple speed ethernet ip.

Thanks,

snehal_p

[paveetirrasrie_Intel]

Hi Snehan,

Good day to you.

Any update on this?

Regards,

Pavee

[paveetirrasrie_Intel]

Hi Snehan,

Here's what I've attached earlier. Have tried it out with example design first?

https://www.intel.com/content/www/us/en/docs/programmable/683502/17-1/s.html

[paveetirrasrie_Intel]

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