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PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP

Exteranl memory QDRII

Honored Contributor II

Hi all Altera members!:) 

I use the megafunction QDRII + and SRAM. At initialization there is a problem. The Pin Local_init_done is held at zero. At the same time, the local_cal_fail pin rises to logical 1:confused:. At the same time, the PLL is locked, the frequencies go to the output. When creating a project, I used standard TCL scripts for Assigments and for Timings. From the point of view of iron - everything is connected correctly. Maybe someone has a solution. Read and write it does not work. But before the pin local_cal_fail is approved, the output of avalon is incomprehensible to me data. Help please with this question:(. I am using device: "Stratix III EP3SE110F780I3", and QDR memory:"CY7C15632KV18-400BZXI". Thank you in advance. http://s1.radikale.ru/uploads/2017/9/20/1e6d88f1b9c3079875d68a1b7c0c1a39-full.png
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