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5950 Discussions

FFT source_ready in simulation

Honored Contributor II




I have a question to the FFT reaction on source_ready. 

After source_eop I set source_ready to '0' for 3 clock cycles and then set it to '1' again. 

(picture http://www.directupload.net/file/d/3896/qklbqmig_png.htm



1 clock after source ready gone to '0' the source valid of the fft shows something like a "glitch"(?) and sets  

source valid to '0' two clocks after that. With the next clock edge, source_valid is high again. 



The number of clock cycles where source_ready is low seems to have no influence on this behavior. It also happens with 50 cycles 

source_ready low. 



For simulating I have used the auto-generated testbench from the MegaWizard Plugin Managerand compiled the .vho to the work library of 




Is this behavior normal or is my simulation somehow wrong? What can I do to solve the problem? 



thanks in advance and best regards, 

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