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For Cyclone 10 is it acceptable to generate CLKUSR from a PLL?

BAdam1
Beginner
‎02-21-2020 08:32 PM
928 Views

We are using the Cyclone 10 PCIe Hard IP. Is it acceptable to generate the CLKUSR clock from a PLL in the same device? We are not concerned about the delay that will be caused.

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Rahul_S_Intel1
Employee
‎02-27-2020 08:41 AM
791 Views

better to use from the FPLL

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Rahul_S_Intel1
Employee
‎02-27-2020 08:44 AM
791 Views

I am also assuming you are using Cylcone 10 GX

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