Free FFT Co-Processor with Avalon interface and QSYS integration

[Altera_Forum]

Hi, 

 some days ago I have released my free FFT co-processor "bel_fft" under Sourceforge (look for "bel_fft" on SourceForge). It can be used as a co-processor for the NiosII and can seamlessly be integrated into QSYS.  description  bel_fft is a FFT co-processor that can calculate FFTs with arbitrary radix. It is a hardware implementation of the free software Kiss FFT („Keep it simple, Stupid!“). The target was to allow a simple replacement of the software code with the hardware implementation. Therefore bel_fft comes with a software driver that is compatible with the Kiss FFT routines. bel_fft also has a modular architecture and allows interfacing different bus architectures. So far Altera's Avalon bus as well as the Wishbone bus is supported. However, bel_fft's architecture allows an easy adaptation to further bus architectures. It comes with a Java wizard to configure the co-processor and to generate all required files (e.g. twiddle ROMs). bel_fft is distributed under the GNU Lesser Public License 2.1.  features  

• Mixed-radix FFT co-processor for (so far only radix 4 is supported) 
• Master bus interface for memory access 
• Slave interface for configuration and control 
• Modular architecture 
• 32 bit Avalon and Wishbone interface 
• 32 bit and 16 bit data types 
• Can be configured to support four different configurations 
• Configuration is done via a GUI 
• Twiddle factors as ROM(s) 
• Interrupt generation Software compatible to Kiss FFT 
• Seamless integration into Altera's QSYS 
• Comes with an example design for the BeMicro kit 
• Written in Verilog 

 Have fun with it! Any feedback is welcome.  Best regards, Frank