Functional questions about DSP Builder

[Altera_Forum]

Dear all, 

 I have several questions for DSP Builder: 1. Can DSP Builder support triggered subsystem?  2. Does DSP Builder integrator block support external reset not by system reset?  3. Can the models be simulated under continues-step solver?   Thank you!

[Altera_Forum]

1. No. It won't generate any special hardware for these, you can have them in the non-synthesizable part of your system. 

2. It has a sclr port which is shown by default. You can wire this up however you like. 3. I'm not sure what this means.

[Altera_Forum]

Thank you for replying. 

For question 3, since from DSP Userguide: "Simulink issues a warning if you are using an inappropriate solver for your model.You should set the solver options to fixed-step discrete when you are using a single clock domain."   "Use a fixed-step solver for a single clock domain design or a variable-step solver for multiple-clock domain designs."   "To ensure correlation between the HDL and Simulink simulation, you must use a discrete fixed or variable-step solver in Simulink."   But if I need to test the model in Variable-step and continues solver (i.e. ode45), can I still get the same result as discrete solver? Or even it give errors?   Thanks     

[Altera_Forum]

I don't think it will give you errors. It may give you simulation mismatches. (The hardware generated will still be valid, but the testbench stimuli may be generated incorrectly due to the DSP Builder blocks running at unpredictable times).

[Altera_Forum]

So do you mean the simulation result from Simulink is still reliable?

[Altera_Forum]

You'd have to try it out. I haven't tried it in a long time and my memory is hazy.