Getting error in LDPC IP core(decoder) decoded output, how to resolve it?

[gautam_drdo]

I get errors in Decoded output of LDPC IP core. Errors occurs in a specific pattern. Pattern is ,mainly starting bits of two adjacent blocks(600/1200 bits fed to ldpc decoder) . Errors occurs rarely, maybe 2 in 100 blocks or so, and I am not able to find the exact reason for it. Data fed to LDPC decoder is same in every block.

Since I have not been able to fully understand exact relation between parameters(number of iterations/parallelism/width of decoder variables/MSA attn. factor) in LDPC decoder, so I tried and experimented. And found that with MSA attenuation factor as 0.25, I get best output with very less errors.

Now, please help me in understanding that why my decoded output is varying (rarely). And what is the inter-relation of parameters (number of iterations/parallelism/width of decoder variables/MSA attn. factor) on decoder output?

Info about my project: Quartus Prime Lite Edition 20.1 , Cyclone V ,LDPC(WiMedia 1.5, 600/1200, half rate, itr-50, Par-3, Width-4, MSA AF-0.25) Max input data rate of 16Mbps, Processing frequency is 50Mhz, (1 as 1000 and 0 as 0111, best case).

Enclosed: screenshot of error (error occurs in this pattern only.)

Thanks and regards

Gautam

[Ash_R_Intel]

Hi,

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