FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP

HPCII DDR2 init delay

Altera_Forum
Honored Contributor II
889 Views

I connect VHDL-model of mt47h64m16. That model check out time between first command and "stable clock". How can I set delay in HPCII? I try to do it in GUI, but it doesn't work.

0 Kudos
0 Replies
Reply