Hi, i am trying to configure the external phy from CPU via MDIO slave but i am able to read even address in phy registers but not able to read odd address registers from phy.

[DheeraJ]

In Avalon Address bit[0] is read/write access so even if i want to read the address 0x09(1001). it is checking bit[0] and it is giving write access.

so please suggest us how to read odd registers from CPU via MDIO slave.

[AnandRaj_S_Intel]

Hi Dheeraj,

Is your base address and offset address set correctly on software?

Also please refer to sessions 9.4 & 9.2.4. from below link

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_embedded_ip.pdf

Check knowledge-base solutions from below link

https://www.intel.com/content/www/us/en/programmable/support/support-resources/knowledge-base/solutions/rd10052010_44.html

Regards

Anand

[DheeraJ]

Hi Anand,

Base address and offset address is correct, because i am able to access(read) PHY Registers.

this sessions 9.4 & 9.2.4. is related to Ethernet MDIO but in my design i am using MDIO Slave. This is the different IP and he is acting as a slave to CPU.

on processor side we have only MDIO MDC lines. so we cannot use Ethernet MDIO .

Thanks,

Regards,

Dheeraj

[AnandRaj_S_Intel]

Hi Dheera,

Can you share the user guide?

[DheeraJ]

Sure Anand,

please find the below attached document.

[AnandRaj_S_Intel]

Hi,

Presently I don't have access to the IP I will try to get.

Meanwhile, try to use a signal tap for debugging & share images.

Regards

Anand

[AnandRaj_S_Intel]

Hi Dheeraj,

Apologies, We can't provide any information or help in debugging the third party IP.

For further support on third-party IP's,We recommend you to contact the IP vendor.

Regards

Anand