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How can i use the tse ip core with qsys?

Altera_Forum
Honored Contributor II
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hi, 

I am a new to qsys and nios and I am able to use the tse ip core to communicate with pc using TCP/IP.But i don't know how to do implement my design target.So, could anyone give me some tips about the design flow using tse mac and TCP/IP?Whether do i have to use the NicheStack TCP/IP Stack? If not,how could I implement TCP/IP?Thank you very much!
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Altera_Forum
Honored Contributor II
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Yes, TCP/IP is often done in software. NicheStack is one solution, and has the benefit that it is included with the Altera environment and the integration work is already done for you. Some of the other possibilities are listed here: 

http://www.altera.com/devices/processor/nios2/tools/embed-partners/ni2-network-stack.html
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Altera_Forum
Honored Contributor II
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--- Quote Start ---  

Yes, TCP/IP is often done in software. NicheStack is one solution, and has the benefit that it is included with the Altera environment and the integration work is already done for you. Some of the other possibilities are listed here: 

http://www.altera.com/devices/processor/nios2/tools/embed-partners/ni2-network-stack.html 

--- Quote End ---  

I'm much obliged to you for hleping me.I'm confused about the component library provide by Qsys,i don't know when should i use the JTAG_UART,System ID Peripheral and On-Chip Memory.Whether can it work properly when i just use the tse ip core and niosii processer without anything else?Could you give me some tips about how to coustom my own ehernet qsys system?I really appreciate all of your help!
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Altera_Forum
Honored Contributor II
380 Views

 

--- Quote Start ---  

I'm much obliged to you for hleping me.I'm confused about the component library provide by Qsys,i don't know when should i use the JTAG_UART,System ID Peripheral and On-Chip Memory.Whether can it work properly when i just use the tse ip core and niosii processer without anything else?Could you give me some tips about how to coustom my own ehernet qsys system?I really appreciate all of your help! 

--- Quote End ---  

 

 

Sorry to be vague, but basically, you need to do more reading and understanding of what you are trying to accomplish. 

 

If you're using a NIOS, you need memory. And usually if you're using a NIOS, you like to see it's console printf's on a UART. 

 

If you're using ethernet, the packet data needs to be read/written somewhere, and usually that is also memory. 

 

How much you can or cannot remove from the reference examples is going to depend on what IP blocks you are going to replace it with or what functionality you are going to remove. 

 

Good luck!
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Altera_Forum
Honored Contributor II
380 Views

 

--- Quote Start ---  

Sorry to be vague, but basically, you need to do more reading and understanding of what you are trying to accomplish. 

 

If you're using a NIOS, you need memory. And usually if you're using a NIOS, you like to see it's console printf's on a UART. 

 

If you're using ethernet, the packet data needs to be read/written somewhere, and usually that is also memory. 

 

How much you can or cannot remove from the reference examples is going to depend on what IP blocks you are going to replace it with or what functionality you are going to remove. 

 

Good luck! 

--- Quote End ---  

 

Thank you always!I am referring to the NiosII Ethernet Standard Design with cycloneIII device.As far as i know,It seems that the sgdma ip core which is used for transmiting and recieving data is needed for ethernet.Is it right?It uses the on-chip memory for sdgma descriptors, uses the ddr2 controller for sgdma memory controller and use external flash for niosii.But i am confused about how can i use ssram or flash on my board to replace it correspondingly,becasue there is no presets for the chip on my board.So what should i do?I am trying to use ddr2 for both niosii memory and for sdgma?Is it ok?thank you!
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Altera_Forum
Honored Contributor II
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Yes it is OK for both NIOS and SGDMA to access the same memory (DDR2 or otherwise). 

 

Yes it is OK to use different types of memory (SRAM, or flash) instead-of or in-addition-to DDR2. 

 

Regarding flash, obviously you could not use that for SGDMA/TSE packet storage (well, you could but it would be so limited usefulness it is not worth discussing).
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