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How to configure the XCVR serial loopback for DP TX/RX IP core

CJian2
Beginner
833 Views

After building the DP TX/RX IP core example design, how to configure the XCVR serial loopback​ to let the TX video loop to RX?

Would someone please give some suggestion. thanks in advance! 

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1 Reply
Vicky1
Employee
118 Views

Hi,

For serial loopback mode you need to use Native PHY IP Core, refer the Figure 32. Simulation Example Block Diagram for Arria V, Cyclone V, and Stratix V Devices from the following link,

https://www.intel.com/content/www/us/en/programmable/documentation/hco1410462777019.html

Check common interface: Control and Status ports under the Table 16-16: Native PHY Common Interfaces,

https://www.intel.com/content/dam/altera-www/global/en_US/pdfs/literature/ug/xcvr_user_guide.pdf

 

Best Regards

Vikas Jathar 

(This message was posted on behalf of Intel Corporation)

 

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