After building the DP TX/RX IP core example design, how to configure the XCVR serial loopback to let the TX video loop to RX?
Would someone please give some suggestion. thanks in advance!
For serial loopback mode you need to use Native PHY IP Core, refer the Figure 32. Simulation Example Block Diagram for Arria V, Cyclone V, and Stratix V Devices from the following link,
Check common interface: Control and Status ports under the Table 16-16: Native PHY Common Interfaces,
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