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Hi,
I am writing code for making the master module to access the avalon MM slave peripherals (e.g. UFM and ADC). But first I need to know that is there any IP available to access these modules (UFM and ADC)?? I dont want to use NIOS II processor as Master because I dont have enough memory. I am using MAX10SAU169C8GES FPGA. What could be the possible solutions?? Thanks in advance for the comments and suggestions.Enlace copiado
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What is your question actually?As I know every avalon-mm master component like JTAG master should be able to access both UFM and ADC.
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Thanks for your reply...
Actually, I have a microcontroller which sends commands to my FPGA. There is different images I need to store in UFM of FPGA and with every command (from uC) I need to show the respective image on the screen. This is the rough structure. Since UFM is slave connected to Avalon MM fabric and I want to make controlling module which behave as Master. What should I do?? You are saying JTAG master can access the UFM. Can I use it to do my task??? But with the JTAG master do I need to use USB blaster. I am confused with that. It would be nice if you suggest suitable solution. If you dont understand I can explain it in more detail.- Marcar como nuevo
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--- Quote Start --- Hi, I am writing code for making the master module to access the avalon MM slave peripherals (e.g. UFM and ADC). But first I need to know that is there any IP available to access these modules (UFM and ADC)?? I dont want to use NIOS II processor as Master because I dont have enough memory. I am using MAX10SAU169C8GES FPGA. What could be the possible solutions?? Thanks in advance for the comments and suggestions. --- Quote End --- You may try to check the following pages to see if can find any related design for reference: http://www.alterawiki.com/wiki/special:categories https://www.altera.com/products/intellectual-property/reference-designs.html
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Yes, USB blaster is needed if using JTAG interface. You did not specify what kind of interface using for the data transfer from the microcontroller. I suggest you can study and apply the concept of SPI Slave to AvalonMaster Bridge in here chapter 18 https://www.altera.com/en_us/pdfs/literature/hb/nios2/qts_qii55004.pdf.
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