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How to set descriptor length dynamically in PCIe Hard IP (AVMM-DMA interface)

rMa1
Beginner
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In my system, data stream has different length in the three mode, for example, we need descriptor length=128 in mode1, and descriptor length=32 in mode2, descriptor length=100 in mode3, mode set by Host. How to set descriptor length dynamically in PCIe Hard IP (AVMM-DMA interface)?

Thanks. Vicky 

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KhaiChein_Y_Intel
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Hi,


We do not receive any response from you to the previous question/reply/answer that I have provided. This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you


Best regards,

KhaiY


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KhaiChein_Y_Intel
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Hi,


Please allow me some time to check on this.


Thanks

Best regards,

KhaiY


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KhaiChein_Y_Intel
1,769 Views

Hi Vicky,


Upon checking, you may use RD_DMA_LAST_PTR (Read) or WR_DMA_LAST_PTR (Write) to control the descriptor length. If 128 descriptors are specified and all of them execute, then descriptor ID 127 is written to the RD_DMA_LAST_PTR or WR_DMA_LAST_PTR register to start the DMA. 


For example, if RD_DMA_LAST_PTR reads 4, the last descriptor requested is 4. To specify 5 more descriptors, software should write a 9 into the RD_DMA_LAST_PTR register. The DMA executes 5 more descriptors. To have the read DMA record the done bit of every descriptor, program this register to transfer one descriptor at a time. RD_TABLE_SIZE specifies the size of the Read descriptor table. The descriptor ID loops back to 0 after reaching RD_TABLE_SIZE. For example, if the RD_DMA_LAST_PTR value read is 126 and you want to execute three more descriptors, software must write 127, and then 1 into the RD_DMA_LAST_PTR register


You may refer to Intel® Arria® 10 or Intel® Cyclone® 10 GX Avalon® Memory Mapped (AvalonMM) DMA Interface for PCI Express* Solutions User Guide for details.

https://www.intel.cn/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_a10_pcie_avmm_dma.pdf


Thanks

Best regards,

KhaiY


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rMa1
Beginner
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Hi KhaiChein,

     Do you mean RD_TABLE_SIZE could be programed at any time? For example, if I want to use descriptor length is 128, set RD_TABLE_SIZE=128 and RD_DMA_LAST_PTR=127(same as WR_DMA_PTR);  then I want to use descriptor length is 15 after descriptor ID loop back to 0, I will set RD_TABLE_SIZE=15 and RD_DMA_LAST_PTR=14, is it right?

    I want to know if descriptor table length could specific dynamically, in the manual, RD_TABLE_SIZE could be set (only) one time, should be set the maximum size, all descriptor ID  need to go through until RD_TABLE_SIZE, although some times actually use descriptor length are less than RD_TABLE_SIZE(set by before), I mean it is no need to go though all descriptor ID if we could set RD_TABLE_SIZE any time.

   Please correct me.  

Vicky 

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KhaiChein_Y_Intel
1,764 Views

Hi Vicky,


Please allow me some time to check with the team.


Best regards,

KhaiY


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KhaiChein_Y_Intel
1,756 Views

Hi Vicky,


The RD_TABLE_SIZE can be set to a new value after all previous programmed DMA descriptor are completed with no pending transaction and the last pointer register has been written with 0.


The driver, can set this register to 16, then write a new value of last pointer to restart the DMA operation.


Thanks

Best regards,

KhaiY


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rMa1
Beginner
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Hi KhaiY,

    Our driver designer could not change RD_TABLE_ZISE when the path is idle, do you have the detail description about this?

   I want to talk with you about this by phone or online meeting if you could support.

   rongli.ma@bsci.com

Vicky  

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rMa1
Beginner
1,748 Views

Hi KhaiY,

    I want to explain the details again, when driver set the new value to the RD_TABLE_SIZE register,  example  RD_TABLE_SIZE=16(set RD_TABLE_SIZE=128 before, after power on), the operation in the descriptor is also go over the 128 descriptor but not 16,  just like this register are wrote invalid, but there is no any alarm.

Vicky  

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KhaiChein_Y_Intel
1,743 Views

Hi Vicky,


Can you check if (1) the previous programmed DMA descriptor are completed, (2) no pending transaction and (3) the last pointer register has been written with 0 before setting a new value for RD_TABLE_SIZE?


Thanks

Best regards,

KhaiY


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KhaiChein_Y_Intel
1,719 Views

Hi,


May I know if you have any updates?


Thanks

Best regards,

KhaiY


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rMa1
Beginner
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Sorry, it doesn't work, also as previously can not change the RD_TABLE_SIZE actually.  

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KhaiChein_Y_Intel
1,704 Views

Hi Vicky,


Could you share the steps you have done and the result of the steps?


Thanks

Best regards,

KhaiY


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KhaiChein_Y_Intel
1,684 Views

Hi,


We do not receive any response from you to the previous question/reply/answer that I have provided. This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you


Best regards,

KhaiY


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rMa1
Beginner
1,671 Views

Sorry, the RD_TABLE_SIZE can not reset yet now, we will plan to change the DMA solutions later.

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KhaiChein_Y_Intel
1,661 Views

Hi,


Sure. You are welcome to open a new thread if you need further assistance in the future.


Do let me know if you have any thoughts.


Thanks

Best regards,

KhaiY


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