FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
Announcements
Intel Support hours are Monday-Fridays, 8am-5pm PST, except Holidays. Thanks to our community members who provide support during our down time or before we get to your questions. We appreciate you!

Need Forum Guidance? Click here
Search our FPGA Knowledge Articles here.
5748 Discussions

How to use UFM IP of Altera MAX10

Altera_Forum
Honored Contributor I
1,143 Views

Hi to all, 

 

I need to use user flash memory of MAX10 FPGA. I have some questions; 

 

1. Do I need to use NIOS II processor (as Master) to access the altera on chip flash? 

2. Is there any other option to access UFM without using NIOS II processor? 

3. If yes, then maybe you say, I should make a Master component compatible with Avalon MM master but how to make Master component for Avalon MM? 

4. The most important thing I need to know that how to access the UFM? Means how can I write or read data to UFM?? 

 

I will be grateful to you for your comments and suggestions.  

 

Regards 

Usman
0 Kudos
2 Replies
Altera_Forum
Honored Contributor I
95 Views

Hi,  

 

You can use "JTAG to Avalon Master bridge" and System Console to perform read and write to the UFM block in MAX 10. 

In this case you don't need to sue NIOS to access UFM block in MAX 10.
Altera_Forum
Honored Contributor I
95 Views

Thanks for your quick reply nyousf. Maybe you can halp me a bit more if you have time.  

Actully, I need to store some images in UFM which should be permanently stored in it. I have a microcontroller, it sends commands to FPGA that specific image should be displayed on the screen. On every command i have a different image to show. and these images i need to store in UFM. this is the rough structure of my project. it would be great support if you give an idea how to implement it.
Reply