FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
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How to use more than 8 Tranceiver PHY IP?

schlee68
Beginner
445 Views

Hi everyone!

I have designed tx only  transceiver IP

 

{  [ROM]...[Transceiver native]...[Reset Controller IP]...[fpll]  }  X   8 

ROM Size is enough

I have add  one more  {  [ROM]...[Transceiver native]...[Reset Controller IP]...[fpll]  }

or ATX_PLL

 

But error occurred!

Error(14996): The Fitter failed to find a legal placement for all periphery components

 

How to add more 'Transceiver IP' ?

 

Thanks!

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Kshitij_Intel
Employee
424 Views

Hi,


Can you please share which device(OPN) you are targeting and which PHY IP you are using?


Thank you

Kshitij Goel


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Kshitij_Intel
Employee
396 Views

Hi,


As we do not receive any response from you on the previous question that we have provided. Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.


Thank you

Kshitij Goel


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