Honored Contributor II
04-04-2011 02:20 AM
Recently I design auto-rate negotiation function with cpri and altgxb_reconfig core.I could reconfig master and slave transimtter successfully, however I couldn't reconfig slave receiver. I am using quartus 10.0 sp1; the start channel of slave receiver is the default value 4;altgxb_reconfig core is in continous write mode;rx_tx_duplex_sel is set to 0x01; logical_channel_address is set to 0x4; reconfig_mode_sel is set to 0x5. But two reconfig_clk cycles after the write_all asserted, the busy signal is de-asserted and the error signal is asserted for two reconfig_clk cycle Why that?