FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
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I have a customer experiencing this problem with the JESD204B IP:

SZack
Partner
1,149 Views

Has this kind of problem been reported before? Do you have any idea what might be causing this problem or what I should look at to try and track down the problem?

 

Regards,

Steve Zack

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4 Replies
AndyN
New Contributor I
392 Views

I think the forum screwed with your post... What is the problem?

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Nooraini_Y_Intel
Employee
392 Views

Hi Steve,

 

Can you provide more the details of the problem (failure symptom or error message) when using with the JESD204B IP? Then perhaps it would be easier for us to identify whom can help on this thread. Thank you.

 

Regards,

Nooraini

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SZack
Partner
392 Views

I have no idea why this is showing up on the forum. I didn't enter anything this past Friday (10/19),

 

My only current JESD204B issue is I have a customer trying to get the JESD connection to work between an Arria 10 SoC dev kit and an ADI AD9656 dev kit and is seeing disparity errors and no usable eye pattern on the transceiver connection.

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Nathan_R_Intel
Employee
392 Views

Hie,

 

If you are observing disparity error and observing an unusable eye pattern( I am assuming a closed eye or eye diagram cannot be detected by scope of ADC), this could suggest your signal degradation due to channel loss. You could try turning up the Equalization settings within the Arria 10 transceivers to check if can compensate for the board/cable channel loss.

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