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I used Intel SERDES IP for my design on the Arial 10 SoC devlp kit, configured to loop back mode (64 bits output => SERDES => Serial data => SERDES => 64 bits input). It showed a lot of bit flips in the 64 bits input. Do you have any ideas? Thanks

DDao
Beginner
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Rahul_S_Intel1
Employee
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Hi , Kindly use the example design first that is generated from the IP, so that any setting error can be isolated. Regards, Rs
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