IO standard

[ymiler]

Hi

I have differential (P/N)   wires in the top of the FPGA (input & output)

My question is  : How can I know which IO standard I should to define 

I found out a lot of options to define  :

Differential SSTL-18 Class I 50 100
Differential SSTL-18 Class II 25 100
Differential SSTL-15 Class I 50 100
Differential SSTL-15 Class II 25 100
Differential SSTL-15 34, 40 240
Differential SSTL-135 34, 40 240
Differential SSTL-15 Class I 50 100
Differential SSTL-15 Class II 25 100
Differential SSTL-125 34, 40 240
Differential SSTL-12 34, 40, 60, 120, 240 240
Differential POD12 34, 40, 48, 60 240
Differential 1.8 V HSTL Class I 50 100
Differential 1.8 V HSTL Class II 25 100
Differential 1.5 V HSTL Class I 50 100
Differential 1.5 V HSTL Class II 25 100
Differential 1.2 V HSTL Class I 50 100
Differential 1.2 V HSTL Class II 25 100
Differential HSUL-12

LVDS

Mini-LVDS

RSDS

Where can I find doc. that describe the differences between all the defintion and How  I choose 1 of them ?

The attach doc. doesn't explain when I need to choose each of them  :

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/stratix-10/ug-s10-gpio.pdf

Do you have another doc . ?

Thanks 

Yishay

[AminT_Intel]

Hello,

These are the two documents that are mainly being used in designs:

1. GPIO User Guide: https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/stratix-10/ug-s10-gpio.pdf

2. Device Datasheet: https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/stratix-10/s10_datasheet.pdf

These documents do not explain in details when you have to use the information is enough to know what it does based on the specs given.

Thank you.

[AminT_Intel]

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