IP cores to implement 10Gbps EPON/GPON in Stratix IV GT
I would like to implement 10 Gbps EPON (or GPON) according to IEEE 802.3-2008 standard (or ITU-T standard) then modify the mutilpoint MAC control sublayer for improving energy efficiency of the PON system.
I have 3 Transceiver Signal Integrity Development Kit, Stratix IV GT Edition (DK-SI-4S100G2N). I plan to implement one as the OLT and two others as ONUs. First, the standard PON system will be implemented. Then the point-to-multipoint protocol will be modified to implement sleep mechanism for the purpose of saving energy at ONUs. As I am new to FPGA designs, I still do not know what are the necessary IP Core utilities to realize our target design. Also, I am trying to find out the procedure for my task. Any of your experience in implementing PONs, MAC protocol in FPGA, especially Stratix IV GT is much appreciated. If any further information is necessary, please let me know. Thanks a lot.