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Hi,
Someone delivered a block to me generated in DSP builder. I add the *hw.tcl file. But that only defined the interfaces for me. Do I have to manually search for and import all of the VHDL files under the hierarchy (there are many)? Or is there a simple way to automatically recover the list of VHDL files that are required for synthesis? Thanks MartinLink Copied
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The hw.tcl file should lists the files it needs. If you open it in a text editor, you should see lines that start add_fileset_file or add_file (depending on what version of DSP Builder they used).
Also, if you generate in Qsys for synthesis, you should get a qip file which you would normally add to your quartus project. If you archived the project and unarchived to another location I suspect Quartus would only take the files specified in the QIP (leaving any intermediate or simulation files).
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