Interfacing DCFIFO_MIXED_WIDTHS FIFO function with AVALON-MMinterface

[ASuba]

Hello

I would like to know the possibility to Interface AVALON -MM Interface with ​ DCFIFO_MIXED_WIDTHS FIFO.   Would it be possible to send the data and Control Signals via AVALON-MM for  DCFIFO_MIXED_WIDTHS FIFO ?

Best Regards;

Athira

[GuaBin_N_Intel]

No, we could not change different width port of DCFIFO in the avalon-mm FIFO IP. It is configured as same port width. There is no option in the register map or IP GUI for user to change https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_embedded_ip.pdf, 24.5

[ASuba]

​Is there a possibility to acheive this in Avalon-MM by desigining a custom FIFO with different Input and Output widths  and dual clock?

[GuaBin_N_Intel]

Yes, you could do that by instantiating DCFIFO from IP catalog https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_fifo.pdf and wrapping it with avalon-mm interface. You can reference to the HDL generation from the avalon-mm FIFO on how to check the status and control of IP through register mapping.