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Is there a SPI core IP which is 'run-time programmable'?

ADinc
Beginner
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The SPI core described in Embedded Peripherals IP User Guide (UG-01085) is not flexible with Master/ Slave, CPOL/CPHA, MSB/LSB settings. They have to be set at the system generation time but I need host SW to program these flexibly.

Thanks,

Asli

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