FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
Announcements
Intel Support hours are Monday-Fridays, 8am-5pm PST, except Holidays. Thanks to our community members who provide support during our down time or before we get to your questions. We appreciate you!

Need Forum Guidance? Click here
Search our FPGA Knowledge Articles here.
5982 Discussions

Max10 speedgrade 8 and DDR2 memory

Altera_Forum
Honored Contributor II
865 Views

Hi, 

 

The MegaWizard tells me that Max10 speedgrade 8 devices are not supported for DDR2 memory interface generation in general. 

I've now targeted a speedgrade 7 device and created the RAM interface successfully (at least I think so as TimeQuest reports OK and I have no hardware available yet to test it in reality). 

 

If I then switch back my design to a speedgrade 8 device and recompile it using the previously generated memory interface, TimeQuest still reports positive slack. 

 

So, for now I have two tools reporting two different results. 

 

Is TimeQuest currently not testing properly? 

Is the MegaWizard as well as the online memory selector guessing too pessimistic as the result (speedgrade 8 not supported) does not depend on clock frequency and RAM delay settings? 

Or what did I do wrong? 

 

Best regards, 

tfranke
0 Kudos
1 Reply
Altera_Forum
Honored Contributor II
112 Views

Even the -8 device able to close timing in timequest, but it do not have any functionality validation on on actual hardware, so we cannot claim it is supported.  

I will suggest we refer to EMIF estimator for clearer support scheme.  

https://www.altera.com/products/intellectual-property/best-in-class-ip/external-memory/support-selec... 

Apparently, -8 for Max 10 do not support DDR2. 

 

(This message was posted on behalf of Intel Corporation)
Reply