I am working on a Cyclone IV design, and need a DDR2 controller.Using Qsys, I have added the IP block DDR2 SDRAM CONTROLLER with ALTMEMPHY One of the interfaces on this IP is labeled "external_connection" and contains three signals, all outputs: local_init_done, local_refresh_ack, reset_phy_clk_n I get a Qsys warning that this must be exported or connected to a matching conduit. My problem is that I don't know what I am supposed to do with these signals. the link to online documentation for the IP doesn't work, I get the "404" error at the Altera website. I have tried looking in the "Embedded Peripherals IP User Guide" under "SDRAM Controller core" but there is no mention of these signals that I can find. Can anyone help me? Rod
This is the document you want:https://www.altera.com/support/literature/lit-external-memory-interface.html local_init_done indicates when the memory calibration is complete. local_refresh_ack is only used and needed if you're doing manual auto refresh control of the external memory. reset_phy_clk_n indicates when the clock used for the PHY is reset.
This is the IP status signal. Usually it have to export and monitor by user. however, if it is not necessary for your design, you can ignore this warning.(This message was posted on behalf of Intel Corporation)