Hello guys!
I'm having a very tricky issue. I have a board with a micrel PHY and, using OCM 9.1, the driver for the micrel-PHY with 9.1sp2 tools, I have a working system. the OCM it's at 100 MHZ. Because of a distraction we set the MDIO CLK parameter to 100, but the communication is OK. Oscilloscope shows a 1MHz signal in the MDC clk, but everything is operative(I think 2.5MHz is the upper up limit, right?)
Well, the problem came when we upgraded this design to v11 tools. The same design, but with a CFI Flash(which is in another i/o bank) and now the OCM at a 50MHz frequency. There are no packages being generated by the phy, I see nothing with wireshark(P2P communication). First we used MDIO CLK set to 20(50MHz/2.5MHz), the MDC signal was working at 2.5MHz but nothing was being generated. Then we set the divider to 50(just to try...) the MDC signal is working at 1MHz again, but still, no packets are being sent/received.
I've tested but UC/OS TCP stack and the old 'superloop' mode of the interniche stack, with no results. Have anyone else have had this issue with this OCM?
